Senior Compute Library Engineer - Parallel Programming / Microarchitecture / C++

Full Job Description

Senior Compute Library Engineer - Parallel Programming / Microarchitecture / C++

We are currently partnered with a cutting-edge semiconductor startup in the UK working on next-generation CPU/Risc-V technologies. The team is looking to expand its headcount with a Senior Compute Library Engineer to actively contribute to the advancement in capabilities and performance of cutting-edge technologies.

This is a permanent opportunity based in Cambridge. Hybrid work is possible - however, the extent of this will vary dependant on experience.

Key Responsibilities for this Senior Compute Library Engineer position:

• Developing high-performance kernels for use on NPU architectures by ML operators.
• Ensuring maximum efficiency and performance of existing kernels.
• Integrating kernels into NPU framework in collaborating with hardware and software teams.
• Conduct testing and debugging of kernels and utilizing hardware features of GPU/accelerators specialized for AI applications.
• Maintaining clear, concise, and comprehensive design documentation and code.

Key Requirements:

• A minimum of 5 years of relevant industry experience developing kernels for hardware accelerators.
• Strong knowledge of CPU, GPU, NPU, or VPU microarchitecture.
• Extensive experience in parallel programming in either CUDA or OpenCL.
• Strong software development skills (including strong skills in C/C++) and a basic understanding of ML frameworks.
• Strong expereince with SIMD is highly advantageous.

Keywords: Compute Library / CL / Parallel Programming / CUDA / OpenCL / Microarchitecture / Micro-architecture / Micro Architecture / Git / Jira / Machine Learning / ML / Tensorflow / Pytorch / C / C++ / NPU / CPU / GPU / VPU

If you are interested in this Senior Compute Library Engineer position, please send a copy of your CV to